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1:2 Single-Ended, Low Cost Active RF Splitter ADA4303-2
FEATURES
Ideal for CATV applications Excellent frequency response 1.7 GHz, -3 dB bandwidth 1 dB flatness to 1.2 GHz Low noise figure: 4.4 dB Low distortion Composite second order (CSO): -62 dBc Composite triple beat (CTB): -72 dBc 1 dB compression point of 8.5 dBm 3 dB of gain per output channel 24 dB isolation between output channels 75 input and outputs Small package size 12-lead, 3 mm x 3 mm lead frame chip scale package
FUNCTIONAL BLOCK DIAGRAM
5V 5V
0.1F 0.1F
1H
VCC
IL
VO1 VIN
0.01F
ADA4303-2
VO2
0.01F
0.01F 249 GND
249
APPLICATIONS
Set-top boxes Home gateways CATV distribution systems Splitter modules Digital cable ready (DCR) TVs
Figure 1.
GENERAL DESCRIPTION
The ADA4303-2 is a 75 , two-output active splitter for use in applications where a lossless signal split is required. Typical applications include multituner digital set-top boxes, cable splitter modules, multituner/digital cable ready (DCR) televisions, and home gateways where traditional solutions require discrete passive splitter modules with separate fixed gain amplifiers. The ADA4303-2 is a low cost alternative that simplifies designs and improves system performance by integrating a signal splitter element and a gain block into a single IC. The ADA4303-2 is available in a 12-lead chip scale package (LFCSP_VQ) and operates in the extended industrial temperature range of -40C to +85C.
4 3 2 1 0
GAIN (dB)
TA = -40C
TA = +25C TA = +85C
-1 -2 -3 -4 -5 -6 -7 100
1000 FREQUENCY (MHz)
4000
Figure 2. Gain (S21) vs. Frequency
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2006 Analog Devices, Inc. All rights reserved.
06364-010
-8 50
06364-001
ADA4303-2 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 4 Thermal Resistance ...................................................................... 4 ESD Caution.................................................................................. 4 Pin Configuration and Function Descriptions..............................5 Typical Performance Characteristics ..............................................6 Applications........................................................................................8 Circuit Description .......................................................................8 Evaluation Board ...........................................................................8 RF Layout Considerations............................................................8 Power Supply..................................................................................8 Outline Dimensions ..........................................................................9 Ordering Guide .............................................................................9
REVISION HISTORY
10/06--Revision 0: Initial Version
Rev. 0 | Page 2 of 12
ADA4303-2 SPECIFICATIONS
VCC = 5 V, RIN = RL = 75 , TA = 25C, unless otherwise noted. Table 1.
Parameter DYNAMIC PERFORMANCE Bandwidth (-3 dB) Specified Frequency Range Gain (S21) 1 dB Gain Flatness NOISE/DISTORTION PERFORMANCE Noise Figure Conditions Min Typ 1700 f = 100 MHz 54 2.0 3.0 1200 4.0 4.3 4.4 26.5 44.0 -72 -62 -68 865 4.0 Max Unit MHz MHz dB MHz dB dB dB dBm dBm dBc dBc dBc
Output IP3 Output IP2 Composite Triple Beat (CTB) Composite Second-Order (CSO) Cross Modulation (CXM) INPUT CHARACTERISTICS Input Return Loss (S11)
@ 54 MHz @ 550 MHz @ 865 MHz f1 = 97.25 MHz, f2 = 103.25 MHz f1 = 97.25 MHz, f2 = 103.25 MHz 135 Channels, 15 dBmV/Channel, f = 865 MHz 135 Channels, 15 dBmV/Channel, f = 865 MHz 135 Channels, 15 dBmV/Channel, 100% modulation @ 15.75 kHz, f = 865 MHz Referenced to 75 @ 54 MHz @ 550 MHz @ 865 MHz Any output, 54 MHz to 865 MHz @ 54 MHz @ 550 MHz @ 865 MHz Referenced to 75 @ 54 MHz @ 550 MHz @ 865 MHz Between any two outputs, 54 MHz to 865 MHz @ 54 MHz @ 550 MHz @ 865 MHz Output referred, f = 100 MHz 4.5
4.3 4.9 5.1
-66 -60 -65
-15.0 -19.5 -12.0 -31.8 -32.0 -32.5
-11.5 -14.0 -7.5 -29.0 -29.5 -30.0
dB dB dB dB dB dB
Output-to-Input Isolation (S12)
OUTPUT CHARACTERISTICS Output Return Loss (S22)
-31.2 -19.4 -15.5 -24.6 -24.0 -24.5 8.5 5.0 78
-23.0 -14.0 -11.0
dB dB dB dB dB dB dBm
Output-to-Output Isolation
1 dB Compression POWER SUPPLY Nominal Supply Voltage Quiescent Supply Current
5.5 90
V mA
Rev. 0 | Page 3 of 12
ADA4303-2 ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Supply Voltage Power Dissipation Storage Temperature Range Operating Temperature Range Lead Temperature (Soldering, 10 sec) Junction Temperature Rating 5.5 V See Figure 3 -65C to +125C -40C to +85C 300C 150C
Stresses above those listed under Absolute Maximum Rating may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive. The quiescent power is the voltage between the supply pins (VS) times the quiescent current (IS). The power dissipated due to the load drive depends upon the particular application. The power due to load drive is calculated by multiplying the load current by the associated voltage drop across the device. RMS voltages and currents must be used in these calculations. Airflow increases heat dissipation, effectively reducing JA. In addition, more metal directly in contact with the package leads/exposed pad from metal traces, through-holes, ground, and power planes reduces the JA. Figure 3 shows the maximum safe power dissipation in the package vs. the ambient temperature for the 12-lead LFCSP_VQ (99.2C/W) on a JEDEC standard 4-layer board.
2.5
THERMAL RESISTANCE
JA is specified for the worst-case conditions; that is, JA is specified for a device (including exposed pad) soldered to the circuit board. Table 3. Thermal Resistance
Package Type 12-Lead LFCSP_VQ (exposed pad) JA 99.2 Unit C/W
MAXIMUM POWER DISSIPATION (W)
2.0
1.5
1.0
Maximum Power Dissipation
The maximum safe power dissipation in the ADA4303-2 package is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the ADA4303-2. Exceeding a junction temperature of 150C for an extended period can result in changes in the silicon devices, potentially causing failure.
0.5
-40
-20
0
20
40
60
80
100
120
AMBIENT TEMPERATURE (C)
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
Rev. 0 | Page 4 of 12
06364-016
0 -60
ADA4303-2 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
12 VCC
PIN 1 INDICATOR
10 NC
11 IL
VCC 1 VIN 2 GND 3
9 VO1 8 VO2 7 GND
ADA4303-2
TOP VIEW
GND 4
GND 5
NC 6
NC = NO CONNECT
Figure 4. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 Mnemonic VCC VIN GND GND GND NC GND VO2 VO1 NC IL VCC Description Supply Pin Input Ground Ground Ground No Connection Ground Output 2 Output 1 No Connection Bias Pin Supply Pin
Rev. 0 | Page 5 of 12
06364-002
ADA4303-2 TYPICAL PERFORMANCE CHARACTERISTICS
-50 -53 -56 -59 TA = +85C 8 10
CSO (dBc)
-62 -65 -68 -71 -74 -77
06364-004
NOISE FIGURE (dB)
6
TA = +25C TA = -40C
TA = +85C
4 TA = +25C 2 TA = -40C
100 FREQUENCY (MHz)
1000
100 FREQUENCY (MHz)
1000
Figure 5. Composite Second-Order (CSO) vs. Frequency
-60 -63 -66 50 TA = +85C 60 55
Figure 8. Noise Figure vs. Frequency
OUTPUT IP2 (dBm)
-69
CTB (dBc)
-72 -75 -78 -81 -84 -87
06364-005
45 40 35 30 25 20 50
TA = +25C
TA = -40C
100 FREQUENCY (MHz)
1000
100 FREQUENCY (MHz)
1000
Figure 6. Composite Triple Beat (CTB) vs. Frequency
-60 -63 -66 30 -72 -75 -78 -81 -84 -87
06364-006
Figure 9. Output IP2 vs. Frequency
40 35
TA = +85C
OUTPUT IP3 (dBm)
-69
CXM (dBc)
25 20 15 10 5 0 50
TA = +25C
TA = -40C
100 FREQUENCY (MHz)
1000
100 FREQUENCY (MHz)
1000
Figure 7. Cross Modulation (CXM) vs. Frequency
Figure 10. Output IP3 vs. Frequency
Rev. 0 | Page 6 of 12
06364-009
-90 50
06364-008
-90 50
06364-007
-80 50
0 50
ADA4303-2
4 3 2 1 0 TA = +25C TA = +85C TA = -40C 0
-5
INPUT RETURN LOSS (dB)
06364-010
-10
GAIN (dB)
-1 -2 -3 -4 -5 -6 -7 100
-15
-20
-25
1000 FREQUENCY (MHz)
4000
100 FREQUENCY (MHz)
1000
Figure 11. Gain (S21) vs. Frequency
-30 -31 0 -5
Figure 14. Input Return Loss (S11) vs. Frequency
OUTPUT RETURN LOSS (dB)
-32 -33
-10 -15 -20 -25 -30 -35 -40 50
ISOLATION (dB)
-34 -35 -36 -37 -38 -39
06364-011
100
1000 FREQUENCY (MHz)
4000
100 FREQUENCY (MHz)
1000
Figure 12. Output-to-Input Isolation (S12) vs. Frequency
0 -5 -10 90
Figure 15. Output Return Loss (S22) vs. Frequency
QUIESCENT SUPPLY CURRENT (mA)
85
ISOLATION (dB)
-15 -20 -25 -30 -35 -40
06364-012
80
75
70
100
1000 FREQUENCY (MHz)
4000
10 20 30 40 50 60 70 80 90 100
TEMPERATURE (C)
Figure 13. Output-to-Output Isolation vs. Frequency
Figure 16. Quiescent Supply Current vs. Temperature
Rev. 0 | Page 7 of 12
06364-015
-45 50
65 -60 -50 -40 -30 -20 -10 0
06364-014
-40 50
06364-013
-8 50
-30 50
ADA4303-2 APPLICATIONS
The ADA4303-2 active splitter is primarily intended for use in the downstream path of television set-top boxes (STBs) that contain multiple tuners. It is typically located directly after the diplexer in a CATV customer premise unit. The ADA4303-2 provides a single-ended input and two single-ended outputs that allow the delivery of the RF signal to two different signal paths. These paths can include, but are not limited to, a main picture tuner, a picture-in-picture (PIP) tuner, an out-of-band (OOB) tuner, a digital video recorder (DVR), and a cable modem (CM). The ADA4303-2 exhibits composite second-order (CSO) and composite triple beat (CTB) products that are -62 dBc and -72 dBc, respectively. The use of the SiGe process also allows the ADA4303-2 to achieve a noise figure (NF) of less than 4.5 dB.
EVALUATION BOARD
The ADA4303-2 evaluation board allows designers to assess the performance of the part in their particular applications. The board includes 75 coaxial connectors and 75 controlled-impedance signal traces that carry the input and output signals. Power (5 V) is applied to the red VCC loop connector, and ground is connected to the black GND loop connector. The board has two 249 resistors between each output and ground that set the gain of the overall circuit to 3 dB and improve output-to-output isolation. A schematic of the ADA4303-2 evaluation board is shown in Figure 17.
RF LAYOUT CONSIDERATIONS
Appropriate impedance matching techniques are mandatory when designing a circuit board for the ADA4303-2. Improper characteristic impedances on traces can cause reflections that can lead to poor linearity. The characteristic impedance of the signal trace from each output should be 75 .
CIRCUIT DESCRIPTION
The ADA4303-2 consists of a low noise buffer amplifier followed by a resistive power divider. This arrangement provides 3 dB of gain relative to the RF signal present at the input of the device. The input and each output must be properly matched to a 75 environment for distortion and noise performance to match the data sheet specifications. In addition, to achieve the specified gain, a 1% 249 resistor should be installed to ground on each output. AC coupling capacitors of 0.01 F are recommended for the input and outputs. A 1 H RF choke (Coilcraft chip inductor 0805LS-102X) is required to correctly bias internal nodes of the ADA4303-2. It should be connected between the 5 V supply and IL (Pin 11).
POWER SUPPLY
The 5 V supply should be applied to each of the VCC pins and RF choke via a low impedance power bus. The power bus should be decoupled to ground using a 10 F tantalum capacitor and a 0.1 F ceramic chip capacitor located close to the ADA4303-2. In addition, the VCC pins should be decoupled to ground with a 0.1 F ceramic chip capacitor located as close to each of the pins as possible.
VCC GND
C5 10F C6 0.1F
+
C1 0.1F
L1 1.0H
12
11
10
C3 0.01F 249
J2
VCC
IL
NC
J1
C2 0.01F
1 2 3
VCC VIN GND
ADA4303-2
VO1 VO2 GND
9 8 7 C4 0.01F
249
J3
GND
GND
5
4
NC
6
06364-003
NC = NO CONNECT
Figure 17. ADA4303-2 Evaluation Board Schematic
Rev. 0 | Page 8 of 12
ADA4303-2 OUTLINE DIMENSIONS
3.00 BSC SQ 0.45 PIN 1 INDICATOR TOP VIEW 2.75 BSC SQ EXPOSED PAD (BOTTOM VIEW) 12 MAX 1.00 0.85 0.80 SEATING PLANE 0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM 0.30 0.23 0.18 0.20 REF COPLANARITY 0.08 0.50 BSC 0.60 MAX 0.75 0.55 0.35 PIN 1 INDICATOR *1.45 1.30 SQ 1.15
9 8 7
10
11 12
1 2
6
5
4
3
0.25 MIN
*COMPLIANT TO JEDEC STANDARDS MO-220-VEED-1 EXCEPT FOR EXPOSED PAD DIMENSION.
Figure 18. 12-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 3 mm x 3 mm Body, Very Thin Quad (CP-12-1) Dimensions shown in millimeters
ORDERING GUIDE
Model ADA4303-2ACPZ-RL 1 ADA4303-2ACPZ-R71 ADA4303-2ACPZ-R21 ADA4303-2ACPZ-EB1
1
Temperature Range -40C to +85C -40C to +85C -40C to +85C
Package Description 12-Lead LFCSP_VQ 12-Lead LFCSP_VQ 12-Lead LFCSP_VQ Evaluation Board
Package Option CP-12-1 CP-12-1 CP-12-1
Ordering Quantity 5000 1500 250
Branding H0V H0V H0V
Z = Pb-free part.
Rev. 0 | Page 9 of 12
ADA4303-2 NOTES
Rev. 0 | Page 10 of 12
ADA4303-2 NOTES
Rev. 0 | Page 11 of 12
ADA4303-2 NOTES
(c)2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06364-0-10/06(0)
Rev. 0 | Page 12 of 12

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